CACHEFLUSH

cacheflush − flush contents of instruction and/or data cache

#include <asm/cachectl.h>

int cacheflush(char *addr, int nbytes, int cache);

cacheflush flushes contents of indicated cache(s) for user addresses in the range addr to (addr+nbytes-1). Cache may be one of:

ICACHE

Flush the instruction cache.

DCACHE

Write back to memory and invalidate the affected valid cache lines.

BCACHE

Same as (ICACHE|DCACHE).

cacheflush returns 0 on success or -1 on error. If errors are detected, errno will indicate the error.

EINVAL

cache parameter is not one of ICACHE, DCACHE, or BCACHE.

Some or all of the address range addr to (addr+nbytes-1) is not accessible.

The current implementation ignores the addr and nbytes parameters. Therefore always the whole cache is flushed.

This system call is only available on MIPS based systems. It should not be used in programs intended to be portable.